https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66112

--- Comment #3 from Jeremy <gcc.hall at gmail dot com> ---
Related FYI,
Few instructions on ARM set the overflow flag.  Two that do are 32-bit add and
subtract.  For these two, GCC could just emit "adds" followed by "bvs" 
Instead it produces:-

    bl  atoi    @
    add r1, r4, r0  @ tmp121, a, b
    cmp r0, #0  @ b,
    blt .L4 @,
    cmp r1, r4  @ tmp121, a
    bge .L5 @,
    b   .L3 @
.L4:
    cmp r1, r4  @ tmp121, a
    ble .L5 @,

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