https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69199
Bug ID: 69199
Summary: Incorrect prototypes for AVX512 unaligned load/store
builtin functions
Product: gcc
Version: 6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: hjl.tools at gmail dot com
CC: kirill.yukhin at intel dot com, ubizjak at gmail dot com
Target Milestone: ---
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_loaddquv16si_mask,
"__builtin_ia32_loaddqusi512_mask", IX86_BUILTIN_LOADDQUSI512, UNKNOWN, (int)
V16SI_FTYPE_PCV16SI_V16SI_UHI },
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_loaddquv8di_mask,
"__builtin_ia32_loaddqudi512_mask", IX86_BUILTIN_LOADDQUDI512, UNKNOWN, (int)
V8DI_FTYPE_PCV8DI_V8DI_UQI },
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_storedquv16si_mask,
"__builtin_ia32_storedqusi512_mask", IX86_BUILTIN_STOREDQUSI512, UNKNOWN, (int)
VOID_FTYPE_PV16SI_V16SI_UHI },
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_storedquv8di_mask,
"__builtin_ia32_storedqudi512_mask", IX86_BUILTIN_STOREDQUDI512, UNKNOWN, (int)
VOID_FTYPE_PV8DI_V8DI_UQI },
{ OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_loaddquv32hi_mask,
"__builtin_ia32_loaddquhi512_mask", IX86_BUILTIN_LOADDQUHI512_MASK, UNKNOWN,
(int) V32HI_FTYPE_PCV32HI_V32HI_USI },
{ OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512f_loaddquv64qi_mask,
"__builtin_ia32_loaddquqi512_mask", IX86_BUILTIN_LOADDQUQI512_MASK, UNKNOWN,
(int) V64QI_FTYPE_PCV64QI_V64QI_UDI },
{ OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_storedquv32hi_mask,
"__builtin_ia32_storedquhi512_mask", IX86_BUILTIN_STOREDQUHI512_MASK, UNKNOWN,
(int) VOID_FTYPE_PV32HI_V32HI_USI },
{ OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_storedquv64qi_mask,
"__builtin_ia32_storedquqi512_mask", IX86_BUILTIN_STOREDQUQI512_MASK, UNKNOWN,
(int) VOID_FTYPE_PV64QI_V64QI_UDI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_loaddquv16hi_mask, "__builtin_ia32_loaddquhi256_mask",
IX86_BUILTIN_LOADDQUHI256_MASK, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_loaddquv8hi_mask, "__builtin_ia32_loaddquhi128_mask",
IX86_BUILTIN_LOADDQUHI128_MASK, UNKNOWN, (int) V8HI_FTYPE_PCV8HI_V8HI_UQI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx_loaddquv32qi_mask, "__builtin_ia32_loaddquqi256_mask",
IX86_BUILTIN_LOADDQUQI256_MASK, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_sse2_loaddquv16qi_mask, "__builtin_ia32_loaddquqi128_mask",
IX86_BUILTIN_LOADDQUQI128_MASK, UNKNOWN, (int) V16QI_FTYPE_PCV16QI_V16QI_UHI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_loaddquv4di_mask,
"__builtin_ia32_loaddqudi256_mask", IX86_BUILTIN_LOADDQUDI256_MASK, UNKNOWN,
(int) V4DI_FTYPE_PCV4DI_V4DI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_loaddquv2di_mask,
"__builtin_ia32_loaddqudi128_mask", IX86_BUILTIN_LOADDQUDI128_MASK, UNKNOWN,
(int) V2DI_FTYPE_PCV2DI_V2DI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx_loaddquv8si_mask,
"__builtin_ia32_loaddqusi256_mask", IX86_BUILTIN_LOADDQUSI256_MASK, UNKNOWN,
(int) V8SI_FTYPE_PCV8SI_V8SI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_sse2_loaddquv4si_mask,
"__builtin_ia32_loaddqusi128_mask", IX86_BUILTIN_LOADDQUSI128_MASK, UNKNOWN,
(int) V4SI_FTYPE_PCV4SI_V4SI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_storedquv4di_mask,
"__builtin_ia32_storedqudi256_mask", IX86_BUILTIN_STOREDQUDI256_MASK, UNKNOWN,
(int) VOID_FTYPE_PV4DI_V4DI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_storedquv2di_mask,
"__builtin_ia32_storedqudi128_mask", IX86_BUILTIN_STOREDQUDI128_MASK, UNKNOWN,
(int) VOID_FTYPE_PV2DI_V2DI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_storedquv8si_mask,
"__builtin_ia32_storedqusi256_mask", IX86_BUILTIN_STOREDQUSI256_MASK, UNKNOWN,
(int) VOID_FTYPE_PV8SI_V8SI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_storedquv4si_mask,
"__builtin_ia32_storedqusi128_mask", IX86_BUILTIN_STOREDQUSI128_MASK, UNKNOWN,
(int) VOID_FTYPE_PV4SI_V4SI_UQI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_storedquv16hi_mask, "__builtin_ia32_storedquhi256_mask",
IX86_BUILTIN_STOREDQUHI256_MASK, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_storedquv8hi_mask, "__builtin_ia32_storedquhi128_mask",
IX86_BUILTIN_STOREDQUHI128_MASK, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_storedquv32qi_mask, "__builtin_ia32_storedquqi256_mask",
IX86_BUILTIN_STOREDQUQI256_MASK, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_storedquv16qi_mask, "__builtin_ia32_storedquqi128_mask",
IX86_BUILTIN_STOREDQUQI128_MASK, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_loaddquv16hi_mask, "__builtin_ia32_movdquhi256_mask",
IX86_BUILTIN_MOVDQUHI256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_loaddquv8hi_mask, "__builtin_ia32_movdquhi128_mask",
IX86_BUILTIN_MOVDQUHI128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx_loaddquv32qi_mask, "__builtin_ia32_movdquqi256_mask",
IX86_BUILTIN_MOVDQUQI256_MASK, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_sse2_loaddquv16qi_mask, "__builtin_ia32_movdquqi128_mask",
IX86_BUILTIN_MOVDQUQI128_MASK, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI },
{ OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512bw_loaddquv32hi_mask,
"__builtin_ia32_movdquhi512_mask", IX86_BUILTIN_MOVDQUHI512_MASK, UNKNOWN,
(int) V32HI_FTYPE_V32HI_V32HI_USI },
{ OPTION_MASK_ISA_AVX512BW, CODE_FOR_avx512f_loaddquv64qi_mask,
"__builtin_ia32_movdquqi512_mask", IX86_BUILTIN_MOVDQUQI512_MASK, UNKNOWN,
(int) V64QI_FTYPE_V64QI_V64QI_UDI },
They should take a pointer to scalar type, not a pointer to vector type
since memory is misaligned.
