https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68973
Jakub Jelinek <jakub at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |jakub at gcc dot gnu.org --- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> --- Mike, could you please have a look at this? This is a P1 blocker. It ICEs also with -mcpu=power7 -mtune=power7. And is again fixed with LRA as various other PPC ICEs. In IRA we have: (insn 155 153 156 8 (set (reg/f:DI 178 [ p3$_M_first ]) (mem/f:DI (pre_inc:DI (reg/f:DI 185 [ p3$_M_node ])) [3 MEM[base: _9, offset: 0B]+0 S8 A64])) pr67211.C:28 540 {*movdi_internal64} (expr_list:REG_INC (reg/f:DI 185 [ p3$_M_node ]) (nil))) and disposition for pseudo 185 looks good: 9:r185 l0 but reload decides to put r185 into a floating point register despite of that, because it is used in some VSX instruction.