https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295
--- Comment #10 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> --- (In reply to Jakub Jelinek from comment #7) > At the RTL level, it would be nice if REE optimized away at least the > redundant zero extension, thus change: > cmp r1, #0 > rev16ne r0, r0 > uxthne r0, r0 > .L2: > sxth r0, r0 > b foos16 > to > cmp r1, #0 > rev16ne r0, r0 > .L2: > sxth r0, r0 > b foos16 > but it seems ARM doesn't enable REE at all. Or should some other pass > handle that case? Isn't REE supposed to be enabled for targets that do automatic extension when writing to a smaller part of a bigger register ? I thought REE existed to remove unnecessary zero extends in those sort of situations on ports that had the above mentioned feature. The only reason why we may want to enable REE on ARM is probably to remove extra extensions after implicit extensions done by a load, but I thought that was handled else where with LOAD_EXTEND_OP in combine. That is what I can see based on a fresh skim of the comments at the top of REE to refresh my memory. Am I missing something ?
