https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69282
--- Comment #14 from Jim Wilson <wilson at gcc dot gnu.org> --- Andrew Pinksi wrote the patch to fix the ICE. I was expecting him to submit it. He also pointed out that the code with the patch is inefficient, and can be optimized by adding some patterns to the aarch64 and arm backends. I thought he was going to do the aarch64 work. I volunteered to look at the arm backend. Adding a vcond_mask* pattern gives a sequence one instruction shorter. To get a sequence two instructions shorter it looks like I need to rewrite some patterns to use vector rtl instead of unspecs, which seemed inappropriate at this time. I was going to look at this again when we move to stage 1. This stuff should perhaps be a separate bug report.