https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70083
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> --- The problem is that while the function is compiled with -mavx512dq, there are no 512-bit vectors in it and thus the dynamic stack realignment code only ensures the stack is 256-bit aligned. But, LRA for some reason chooses to split_reg a function parameter, and that one has its regno_reg_rtx (reg:XI 22 xmm1), a 512-bit mode that doesn't occur in the function, it comes from init_emit_regs: 5814 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 5815 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i); So it creates another pseudo with this extra large mode, and then at a later point attempts to spill it, which is obviously not going to work.