https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71008
H.J. Lu <hjl.tools at gmail dot com> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |NEW Last reconfirmed| |2016-05-08 Target Milestone|--- |7.0 Ever confirmed|0 |1 --- Comment #1 from H.J. Lu <hjl.tools at gmail dot com> --- Combine turns (insn 20 16 22 2 (set (reg:V16SI 111) (vec_merge:V16SI (rotatert:V16SI (reg:V16SI 112 [ x.1_2 ]) (const_int 12 [0xc])) (subreg:V16SI (reg:V8DI 91 [ x.3_5 ]) 0) (reg:HI 89 [ m.2_3 ]))) /export/build/gnu/gcc/build-x86_64-linux/gcc/include/avx512fintrin.h:6931 3152 {avx512f_rorv16si_mask} (expr_list:REG_DEAD (reg:V16SI 112 [ x.1_2 ]) (expr_list:REG_DEAD (reg:V8DI 91 [ x.3_5 ]) (expr_list:REG_DEAD (reg:HI 89 [ m.2_3 ]) (nil))))) (insn 22 20 23 2 (set (reg:V8DI 101 [ _19 ]) (subreg:V8DI (reg:V16SI 111) 0)) /export/build/gnu/gcc/build-x86_64-linux/gcc/include/avx512fintrin.h:6931 1221 {movv8di_internal} (expr_list:REG_DEAD (reg:V16SI 111) (nil))) into Trying 20 -> 22: Successfully matched this instruction: (set (subreg:V16SI (reg:V8DI 101 [ _19 ]) 0) (vec_merge:V16SI (rotate:V16SI (reg:V16SI 112 [ x.1_2 ]) (const_int 20 [0x14])) (subreg:V16SI (reg:V8DI 91 [ x.3_5 ]) 0) (reg:HI 89 [ m.2_3 ]))) allowing combination of insns 20 and 22 It is rotatert vs rotate. How did this happen?