https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71339

            Bug ID: 71339
           Summary: [RL78] Unnecessary addw ax, #0 when incrementing a 32
                    bit value
           Product: gcc
           Version: 6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
  Target Milestone: ---
            Target: rl78-elf

This example

unsigned long test_3 (unsigned long a)
{
  return a + 1;
}

currently compiles to

__Z6test_3m:
        movw ax, [sp+4]
        addw ax, #1
        movw r8, ax
        movw ax, [sp+6]
        sknc
        incw ax
        addw ax, #0             (*)
        movw r10, ax
        ret

The (*) marked insn does nothing (except than changing the flags) in this case
and can be left out.

Looks like because it's a hardcoded asm sequence in rl78_addsi3_internal to
perform a generic 32 bit addition.

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