https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71389
--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> --- Following patch fixes the failure: --cut here-- diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7e9f511..cf5e460 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -19311,7 +19311,7 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1) m = adjust_address (op0, mode, 0); emit_insn (extract (m, op1, const0_rtx)); m = adjust_address (op0, mode, 16); - emit_insn (extract (m, op1, const1_rtx)); + emit_insn (extract (m, copy_rtx (op1), const1_rtx)); } else gcc_unreachable (); --cut here-- But I don't know if this only papers over real problem in the DF infrastructure. We have a couple of similar cases in the next function, e.g.: ... else if (MEM_P (op0)) { if (TARGET_SSE2 && mode == V2DFmode) { m = adjust_address (op0, DFmode, 0); emit_insn (gen_sse2_storelpd (m, op1)); m = adjust_address (op0, DFmode, 8); emit_insn (gen_sse2_storehpd (m, op1)); } else { if (mode != V4SFmode) op1 = gen_lowpart (V4SFmode, op1); m = adjust_address (op0, V2SFmode, 0); emit_insn (gen_sse_storelps (m, op1)); m = adjust_address (op0, V2SFmode, 8); emit_insn (gen_sse_storehps (m, op1)); } } ... without causing problems.