https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71419
Bug ID: 71419
Summary: cortex-a9 IRQ
Product: gcc
Version: 6.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c++
Assignee: unassigned at gcc dot gnu.org
Reporter: hans.buchmann at fhnw dot ch
Target Milestone: ---
Compiling the code:
extern void external();
__attribute__ ((interrupt("IRQ"))) void _irq_() ;
void _irq_()
{
external();
}
with gcc 6.1.0 results in:
Disassembly of section .text:
00000000 <_Z5_irq_v>:
0: e24ee004 sub lr, lr, #4
4: e92d500f push {r0, r1, r2, r3, ip, lr}
8: ebfffffe bl 0 <_Z8externalv>
c: e8bd900f pop {r0, r1, r2, r3, ip, pc} <---- here
The instruction:
e8bd900f pop {r0, r1, r2, r3, ip, pc}
compared to:
e8fd900f ldm sp!, {r0, r1, r2, r3, ip, pc}^
dont copy the SPSR back into the CPSR
The call:
${TC}/bin/arm-none-eabi-g++ -O2 -mcpu=cortex-a9 \
-c -o irq.o ../src/irq.cc
The Compiler g++ -v
Using built-in specs.
COLLECT_GCC=../tc/bin/arm-none-eabi-g++
COLLECT_LTO_WRAPPER=/home/buchmann/devel/gcc/target/arm/libexec/gcc/arm-none-eabi/6.1.0/lto-wrapper
Target: arm-none-eabi
Configured with: /home/buchmann/devel/gcc/dist/gcc-6.1/configure -v
--prefix=/home/buchmann/devel/gcc/target/arm --target=arm-none-eabi
--enable-languages=c,c++ --disable-threads --disable-nls --disable-__cxa_atexit
--with-as=/home/buchmann/devel/gcc/target/arm/arm-none-eabi/bin/as
--with-ld=/home/buchmann/devel/gcc/target/arm/arm-none-eabi/bin/ld
--with-newlib --with-sysroot --without-headers --disable-libssp --enable-lto
--disable-shared --enable-multilib
Thread model: single
gcc version 6.1.0 (GCC)
Kind regards
Hans Buchmann
