https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78904
--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> --- (In reply to Segher Boessenkool from comment #3) > (In reply to Uroš Bizjak from comment #2) > > No, unfortunately the above is not a valid x86 insn. x86 has two-operand > > instructions, so output has to match one of the operands. > > But these are pseudos. Please note that subreg:QI (zero_extract:SI (reg/v:SI 94 [ a ]) (const_int 8 [0x8]) (const_int 8 [0x8])) 0) describes the high-part of a 16bit register, e.g. %ah, while (reg:QI 88 [ _2 ]) describes low-part, e.g. %al The pattern from the comment #1 models %al <- %ah + %bh, which is not a valid x86 insn. > > It looks that combine prefers: > > > > (subreg:SI (plus:QI > > and > > (subreg:QI (zero_extract:SI (... op ...) > > > > while - according to the existing x86 patterns - in the past the patterns > > were seemingly combined into: > > > > (plus:SI > > and > > (zero_extract:SI (... op ...) > > So when did this change? > > Combine in general prefers smaller modes. I don't know when, perhaps with the rewrite of extzv pattern, when mode was added to these patterns? Anyway, I see that some patterns, e.g. *cmpqi_ext_1 are written using (subreg:QI (zero_extract:SI ...)), which seems consistent with your observation in Comment #1. Following your explanation, it looks that: (set (zero_extract:SI (reg:SI 92 [ D.1804 ]) (const_int 8 [0x8]) (const_int 8 [0x8])) (subreg:SI (_op_:QI ... corresponds to setting of the highpart register (%ah), and consequently arith and logic patterns in i386.md have to be rewritten.