https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69617
Segher Boessenkool <segher at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2017-02-27
CC| |segher at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #3 from Segher Boessenkool <segher at gcc dot gnu.org> ---
rs6000.h has
/* Byte/char syncs were added as phased in for ISA 2.06B, but are not present
in power7, so conditionalize them on p8 features. TImode syncs need quad
memory support. */
#define TARGET_SYNC_HI_QI (TARGET_QUAD_MEMORY \
|| TARGET_QUAD_MEMORY_ATOMIC \
|| TARGET_DIRECT_MOVE)
so someone needs to update this to work for the *500 cores as well.
