https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82682
--- Comment #6 from Jeffrey A. Law <law at redhat dot com> --- Of course we can't propagate because %esi doesn't have a QImode equivalent. So to back up a little bit. The costing changes twiddled the register assignments. In particular reg93 gets allocated into %esi rather than %ebx. That in turn means we have to emit a reload to handle this insn: (insn 19 18 20 4 (set (reg:SI 109 [ xr ]) (zero_extend:SI (reg/v:QI 93 [ xr ]))) "j.c":15 140 {*zero_extendqisi2} (expr_list:REG_DEAD (reg/v:QI 93 [ xr ]) (nil))) Because we can't use %esi in QImode. So we get: (insn 36 18 19 4 (set (reg/v:QI 3 bx [orig:93 xr ] [93]) (reg/v:QI 4 si [orig:93 xr ] [93])) "j.c":15 88 {*movqi_internal} (nil)) (insn 19 36 20 4 (set (reg:SI 4 si [orig:109 xr ] [109]) (zero_extend:SI (reg/v:QI 3 bx [orig:93 xr ] [93]))) "j.c":15 140 {*zero_extendqisi2} (nil)) The only reaching def for the source of the zero extend in insn 19 is insn 36, so REE will try to turn insn 36 into: (insn 36 18 19 4 (set (reg:SI 4 si) (zero_extend:SI (reg/v:QI 4 si [orig:93 xr ] [93]))) "j.c":15 -1 (nil)) Which, of course fails. Even if it succeeded, it's not really an improvement. We really need to chase things back up to: (insn 15 14 16 4 (set (reg/v:QI 4 si [orig:93 xr ] [93]) (mem:QI (reg/v/f:SI 1 dx [orig:104 in ] [104]) [0 MEM[base: in_26, offset: 0B]+0 S1 A8])) "j.c":13 88 {*movqi_internal} (nil)) I don't offhand know if we can really model that in REE or not. Though there'd almost certainly be a general benefit to x86 in doing so.