https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86968
Bug ID: 86968
Summary: Unaligned big-endian access on armv7-a yields 4 ldrb
instructions rather than ldr+rev
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: sven.koehler at gmail dot com
Target Milestone: ---
Created attachment 44547
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44547&action=edit
C source code illustrating the problem
armv7-a support unaligned memory access. In case of unaligned little-endian
access, gcc generates a single ldr instrction. Also, for aligned big-endian
access, gcc generates an ldr followed by a rev instruction (reverses byte
order).
However, when big-endian access is not aligned, gcc does not use ldr+rev.
Instead, it generates 4 ldrb instructions plus the code to move the 4 bytes
into a single register.
Find the source and generated assembler code attached.
My compiler command was
arm-none-eabi-gcc -O3 -mthumb -S -o - -march=armv7-a endian.c
The version of gcc is 8.2.0
