https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85368
Christophe Lyon <clyon at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |clyon at gcc dot gnu.org --- Comment #8 from Christophe Lyon <clyon at gcc dot gnu.org> --- I see a regression: FAIL: gcc.dg/tree-ssa/phi-opt-11.c scan-tree-dump-times optimized "if" 0 (used to have PASS: gcc.dg/tree-ssa/phi-opt-11.c scan-tree-dump-times optimized "if" 2) on arm-none-eabi --with-mode thumb --with-cpu cortex-m3 Jakub said: > I've tested it on x86_64 as example of > !logical_op_short_circuit && branch_cost > target, Jeff/Andreas on s390x as example > of logical_op_short_circuit && > branch_cost target and I've tested on > powerpc64{,le} as example of > logical_op_short_circuit && !branch_cost target. > arm is a branch_cost target and cortex-m3 is > logical_op_short_circuit, why > doesn't the -mbranch-cost=2 option override > the cortex-m3 defaults? That's not clear. We have: #define BRANCH_COST(speed_p, predictable_p) \ ((arm_branch_cost != -1) ? arm_branch_cost : \ (current_tune->branch_cost (speed_p, predictable_p))) static int arm_cortex_m_branch_cost (bool speed_p, bool predictable_p) { return (TARGET_32BIT && speed_p) ? 1 : arm_default_branch_cost (speed_p, predictable_p); } But since arm_branch_cost=2, we should just use that.