https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88278
Bug ID: 88278 Summary: Fails to elide zeroing of upper vector register Product: gcc Version: 9.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rguenth at gcc dot gnu.org Target Milestone: --- typedef unsigned char v16qi __attribute__((vector_size(16))); typedef unsigned char v8qi __attribute__((vector_size(8))); v16qi __GIMPLE foo (unsigned char *p) { v8qi _2; v16qi _3; bb_2: _2 = __MEM <v8qi, 8> (p_1(D)); _3 = _Literal (v16qi) { _2, _Literal (v8qi) { _Literal (unsigned char) 0, _Literal (unsigned char) 0, _Literal (unsigned char) 0, _Literal (unsigned char) 0, _Literal (unsigned char) 0, _Literal (unsigned char) 0, _Literal (unsigned char) 0 } }; return _3; } and typedef unsigned int v4si __attribute__((vector_size(16))); typedef unsigned int v2si __attribute__((vector_size(8))); v4si __GIMPLE bar (unsigned int *p) { v2si _2; v4si _3; bb_2: _2 = __MEM <v2si, 32> (p_1(D)); _3 = _Literal (v4si) { _2, _Literal (v2si) { 0u, 0u } }; return _3; } show that trying to code a movq (%rax), %xmm0 fails and we end up with movq (%rdi), %xmm0 pxor %xmm1, %xmm1 punpcklqdq %xmm1, %xmm0 ret for both testcases with -O2 -fgimple combine fails to match (set (reg:V4SI 87) (vec_concat:V4SI (reg:V2SI 88 [ MEM[(unsigned int *)p_1(D)] ]) (const_vector:V2SI [ (const_int 0 [0]) repeated x2 ]))) or (set (reg:V4SI 87) (vec_concat:V4SI (mem:V2SI (reg:DI 90) [1 MEM[(unsigned int *)p_1(D)]+0 S8 A32]) (const_vector:V2SI [ (const_int 0 [0]) repeated x2 ])))