[Bug target/88952] The asm operator modifiers for rs6000 should be documented like they are for x86

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88952

--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Christopher Leonard from comment #5)
> Is the order at least consistant with x86-32? i.e. if you give a 64-bit
> input operand to inline assembly the order is hi:lo? I'm worried this is a
> bizarre convention imposed on high endian architectures.

On x86, we don't allow register pairs in asm at all. Please see print_reg,
where:

  switch (msize)
    {
    case 16:
    case 12:
    case 8:
      if (GENERAL_REGNO_P (regno) && msize > GET_MODE_SIZE (word_mode))
        warning (0, "unsupported size for integer register");
      /* FALLTHRU */

So, if someone wants to handle DImode on 32bit targets, both registers have to
be passed to assembly explicitly, using "(int) lval" and "(int) (lval >> 32)".