https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88713
--- Comment #41 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to H.J. Lu from comment #40)
> (In reply to rguent...@suse.de from comment #39)
> > > >
> > > > Yes. The lack of an expander for the rqsrt operation is probably
> > > > more severe though (causing sqrt + approx recip to appear)
> > > >
> > >
> > > Can we use UNSPEC_RSQRT14 here if UNSPEC_RSQRT28 isn't available?
> >
> > I think we can but we lack an expander for this. IIRC for the following
> > existing expander the RTL is ignored and thus we could simply
> > replace the TARGET_AVX512ER check with TARGET_AVX512F?
> >
> > (define_expand "rsqrtv16sf2"
> > [(set (match_operand:V16SF 0 "register_operand")
> > (unspec:V16SF
> > [(match_operand:V16SF 1 "vector_operand")]
> > UNSPEC_RSQRT28))]
> > "TARGET_SSE_MATH && TARGET_AVX512ER"
> > {
> > ix86_emit_swsqrtsf (operands[0], operands[1], V16SFmode, true);
> > DONE;
> > })
>
> Like this?
>
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index 3af4adc63dd..c9b4750ccc4 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -1969,21 +1969,11 @@
> (set_attr "mode" "<ssescalarmode>")])
>
> (define_expand "rsqrt<mode>2"
> - [(set (match_operand:VF1_128_256 0 "register_operand")
> - (unspec:VF1_128_256
> - [(match_operand:VF1_128_256 1 "vector_operand")] UNSPEC_RSQRT))]
> + [(set (match_operand:VF_AVX512VL 0 "register_operand")
> + (unspec:VF_AVX512VL
> + [(match_operand:VF_AVX512VL 1 "vector_operand")]
> + UNSPEC_RSQRT))]
> "TARGET_SSE_MATH"
> -{
> - ix86_emit_swsqrtsf (operands[0], operands[1], <MODE>mode, true);
> - DONE;
> -})
> -
> -(define_expand "rsqrtv16sf2"
> - [(set (match_operand:V16SF 0 "register_operand")
> - (unspec:V16SF
> - [(match_operand:V16SF 1 "vector_operand")]
> - UNSPEC_RSQRT28))]
> - "TARGET_SSE_MATH && TARGET_AVX512ER"
> {
> ix86_emit_swsqrtsf (operands[0], operands[1], V16SFmode, true);
> DONE;
<MODE>mode instad of V16SFmode.
