https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89190
Bug ID: 89190 Summary: [8/9 regression][ARM] armv8-m.base invalid ldm ICE Product: gcc Version: 8.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: wilco at gcc dot gnu.org Target Milestone: --- The following testcases ICEs with -march=armv8-m.base on arm.none.eabi: long long a; int b, c; int d(int e, int f) { return e << f; } void g() { long long h; char i = d(b >= 7, 2); c = i == 0 ?: 1 / i; h = c && a ?: c + a; b = h; } error: unrecognizable insn: 10 | } | ^ (insn 133 114 105 3 (parallel [ (set (reg:SI 2 r2) (plus:SI (reg:SI 2 r2) (const_int 8 [0x8]))) (set (reg:SI 0 r0) (mem/c:SI (reg/f:SI 2 r2 [127]) [2 a+0 S4 A64])) (set (reg:SI 2 r2) (mem/c:SI (plus:SI (reg/f:SI 2 r2 [127]) (const_int 4 [0x4])) [2 a+4 S4 A32])) ]) -1 (nil)) The reason is that the Thumb-1 LDM code set writeback if the base is dead. However it does not ensure the base register is not also loaded. The fix is to disallow writeback if the base is loaded.