[Bug target/89835] The RISC-V target uses amoswap.w for relaxed stores

[andrew at sifive dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89835

Andrew Waterman <andrew at sifive dot com> changed:

           What    |Removed                     |Added
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                 CC|                            |andrew at sifive dot com

--- Comment #1 from Andrew Waterman <andrew at sifive dot com> ---
That would be a valid optimization, and it would also reduce instruction count
in some cases by allowing the use of base+offset addressing.