https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90061
--- Comment #3 from Michael James <mike at hamble dot online> --- HiSimple tests do not seem to be failing here either regardless of optimisation.They are all producing correct 32 bit load/stores that can be non-aligned. I shall try and extract the code from my larger project on Monday.MikePLEASE NOTE email address change to mike@hamble.online -------- Original message --------From: "amonakov at gcc dot gnu.org" <gcc-bugzi...@gcc.gnu.org> Date: 12/04/2019 15:07 (GMT+00:00) To: mike@hamble.online Subject: [Bug translation/90061] ARM cortex-M hard fault on 64 bit sized object store to unaligned address https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90061Alexander Monakov <amonakov at gcc dot gnu.org> changed: What |Removed |Added---------------------------------------------------------------------------- Status|UNCONFIRMED |WAITING Last reconfirmed| |2019-04-12 CC| |amonakov at gcc dot gnu.org Ever confirmed|0 |1--- Comment #2 from Alexander Monakov <amonakov at gcc dot gnu.org> ---Please provide an example, as a simple smoke-test is compiled correctly:long f(struct hardwareExample *h){ return h->a + h->b;}producesf: ldr r2, [r0, #1] @ unaligned ldr r0, [r0, #5] @ unaligned add r0, r0, r2 bx lr-- You are receiving this mail because:You reported the bug.
