https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90235

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization, ra
             Target|                            |x86_64-*-* i?86-*-*

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
Unaligned spills can indeed be slower (they might cross a cache line boundary).

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