https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90270
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2019-04-28
Ever confirmed|0 |1
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
GCC 7.3.0 for aarch64 produces:
.L2:
ldr w0, [x21, x19]
bl crcu32
mov w1, w0
ldr w0, [x20, x19]
add x19, x19, 4
bl crcu32
and w1, w0, 65535
cmp x19, 32
bne .L2
Which looks correct while GCC 8.3.0 produces:
.L2:
lsl x19, x20, 2
add x0, sp, 32
add x20, x20, 1
add x0, x0, x19
ldr w0, [x0, -4]
bl crcu32
add x1, sp, 64
add x19, x1, x19
mov w1, w0
ldr w0, [x19, -4]
bl crcu32
and w1, w0, 65535
cmp x20, 9
bne .L2
GCC 9.0.1 (from March 10th) produces:
.L2:
lsl x19, x20, 2
add x0, sp, 32
add x20, x20, 1
add x0, x0, x19
ldr w0, [x0, -4]
bl crcu32
add x1, sp, 64
add x19, x1, x19
mov w1, w0
ldr w0, [x19, -4]
bl crcu32
and w1, w0, 65535
cmp x20, 9
bne .L2
So going to assume GCC 9.1.0 also has a similar issue.
