https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78176
--- Comment #34 from Maciej W. Rozycki <ma...@linux-mips.org> --- (In reply to mpf from comment #29) > I don't remember the detail of this issue but I believe I was convinced that > it is down to the lack of setting PX appropriately in HW. UX==0, PX==1. The > PX control bit forces address calculations i.e. base + imm or base + reg to > be performed with 32-bit rules but allows 64 instruction usage. Since there > is a processor mode that is perfectly capable of meeting the requirements of > a program with 64bit data and 32bit pointers then the solution is to set PX > for N32 rather than UX. This is impractical because as I say Linux has to support processors that have no CP0.Status.PX bit and do have to rely on CP0.Status.UX instead. NB Richard, n32 is 64-bit mode, pretty much like x86's x32, except that invented some 20 years earlier. So regs are already DImode as are stack slots, etc.
