https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91635
--- Comment #13 from Jim Wilson <wilson at gcc dot gnu.org> ---
I see 5 broken patterns which matches the list already given. The four
testcases are all triggering on the same splitter, which is the first
define_split, lshrsi3_zero_extend_3+1. The second define_split,
lshrsi3_zero_extend_3+2, requires a mask which has at least 32 zeros in the low
bits. I don't think that this can occur with a paradoxical reg, because the
only valid input bits are all undefined bits in the upper half of the
paradoxical reg. We may as well fix it anyways though to be consistent, but
this means writing a testcase appears to be impossible. The other three are
post reload splitters, which will be hard to write a testcase for. So it looks
like we only have one useful testcase here, but that is better than nothing.
Kito and I can test RISC-V patches.
Using SUBREG_REG would require generating a new reg rtx with the wider mode.
May not be worth the trouble considering how uncommon that case will be.
For the second define_split, the existing testcases that trigger it are
unsigned long
sub1 (unsigned long i)
{
return (i >> 32) << 32;
}
unsigned long
sub2 (unsigned long i)
{
return (i >> 63) << 63;
}
Like I mentioned above, I don't see how that can be rewritten to use a
paradoxical reg.
