https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92645
--- Comment #9 from Richard Biener <rguenth at gcc dot gnu.org> ---
Thanks a lot. So besides the following mismatch for SLP
_24 = MEM[base: src_22(D), index: ivtmp.20_267, offset: 0B];
_97 = (unsigned char) _24;
_98 = (short unsigned int) _97;
_99 = BIT_FIELD_REF <_24, 8, 8>;
_100 = (short unsigned int) _99;
_101 = BIT_FIELD_REF <_24, 8, 16>;
...
there's also missing forwprop (CTOR -> vector SSA) for
_62 = BIT_FIELD_REF <_8, 16, 0>;
_64 = BIT_FIELD_REF <_8, 16, 16>;
_66 = BIT_FIELD_REF <_8, 16, 32>;
_68 = BIT_FIELD_REF <_8, 16, 48>;
_70 = BIT_FIELD_REF <_8, 16, 64>;
_72 = BIT_FIELD_REF <_8, 16, 80>;
_74 = BIT_FIELD_REF <_8, 16, 96>;
_76 = BIT_FIELD_REF <_8, 16, 112>;
_78 = BIT_FIELD_REF <_8, 16, 128>;
_80 = BIT_FIELD_REF <_8, 16, 144>;
_82 = BIT_FIELD_REF <_8, 16, 160>;
_84 = BIT_FIELD_REF <_8, 16, 176>;
_86 = BIT_FIELD_REF <_8, 16, 192>;
_88 = BIT_FIELD_REF <_8, 16, 208>;
_90 = BIT_FIELD_REF <_8, 16, 224>;
_92 = BIT_FIELD_REF <_8, 16, 240>;
_136 = {_78, _80, _82, _84, _86, _88, _90, _92};
_270 = {_62, _64, _66, _68, _70, _72, _74, _76};
because we only look for full vector builds/shuffles but those CTORs
extract the low/high part of _8. I'll see to fix that tomorrow.
The conversion vs. BIT_FIELD_REF somehow completely disables the SLP tree
but we could build from scalars, testing patch to fix that.
