[Bug middle-end/94703] Small-sized memcpy leading to unnecessary register spillage unless done through a dummy union

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94703

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rguenth at gcc dot gnu.org
            Version|unknown                     |10.0
   Last reconfirmed|                            |2020-04-22
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
             Target|                            |x86_64-*-*

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Confirmed.  We end up with

get4_1 (const void * X)
{
  uint64_t r;
  unsigned int _4;
  uint64_t _6;

  <bb 2> [local count: 1073741824]:
  r = 0;
  _4 = MEM <unsigned int> [(char * {ref-all})X_3(D)];
  MEM <unsigned int> [(char * {ref-all})&r] = _4;
  _6 = r;
  r ={v} {CLOBBER};
  return _6;

and

get4_nospill (const void * X)
{
  union
  {
    uint64_t u64;
  } u;
  unsigned int _4;
  uint64_t _6;

  <bb 2> [local count: 1073741824]:
  u.u64 = 0;
  _4 = MEM <unsigned int> [(char * {ref-all})X_3(D)];
  MEM <unsigned int> [(char * {ref-all})&u] = _4;
  _6 = u.u64;
  u ={v} {CLOBBER};
  return _6;

so it's the same on the GIMPLE level but somehow RTL expansion likes
the latter more, expanding 'u' to a register but not 'r'.  Ah,
that's because we have to keep TREE_ADDRESSABLE to prevent 'r' from
being rewritten into SSA but not 'u' ...

Extending DECL_GIMPLE_REG_P to non-vector/comples vars would likely
fix this.

We can also rewrite 'r' into SSA when we use BIT_INSERT_EXPR more
aggressively (not sure if we want that).