https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95531
--- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> ---
So, what kind of sorcery is this?
(insn 2 4 3 2 (set (reg/v:SI 83 [ x ])
(reg:SI 5 di [ x ])) "pr95531.c":2:1 67 {*movsi_internal}
(expr_list:REG_DEAD (reg:SI 5 di [ x ])
(nil)))
(...)
(insn 7 6 8 2 (parallel [
(set (reg:CCC 17 flags)
(compare:CCC (reg/v:SI 83 [ x ])
(const_int 0 [0])))
(set (reg:SI 82 [ <retval> ])
(ctz:SI (reg/v:SI 83 [ x ])))
]) "pr95531.c":3:12 786 {*tzcntsi_1}
(expr_list:REG_DEAD (reg/v:SI 83 [ x ])
(nil)))
(insn 8 7 9 2 (set (reg:SI 82 [ <retval> ])
(if_then_else:SI (eq (reg:CCC 17 flags)
(const_int 0 [0]))
(reg:SI 84)
(reg:SI 82 [ <retval> ]))) "pr95531.c":3:12 1029 {*movsicc_noc}
(expr_list:REG_DEAD (reg:SI 84)
(expr_list:REG_DEAD (reg:CCC 17 flags)
(nil))))
Combine does:
Trying 2 -> 7:
2: r83:SI=r86:SI
REG_DEAD r86:SI
7: {flags:CCC=cmp(r83:SI,0);r82:SI=ctz(r83:SI);}
REG_DEAD r83:SI
Successfully matched this instruction:
(parallel [
(set (reg:CCZ 17 flags)
(compare:CCZ (reg:SI 86)
(const_int 0 [0])))
(set (reg:SI 82 [ <retval> ])
(ctz:SI (reg:SI 86)))
])
Successfully matched this instruction:
(set (reg:SI 82 [ <retval> ])
(if_then_else:SI (eq (reg:CCZ 17 flags)
(const_int 0 [0]))
(reg:SI 84)
(reg:SI 82 [ <retval> ])))
allowing combination of insns 2 and 7
original costs 4 + 4 = 16
replacement cost 12
deferring deletion of insn with uid = 2.
modifying other_insn 8: r82:SI={(flags:CCZ==0)?r84:SI:r82:SI}
REG_DEAD r84:SI
REG_DEAD flags:CCC
deferring rescan insn with uid = 8.
modifying insn i3 7: {flags:CCZ=cmp(r86:SI,0);r82:SI=ctz(r86:SI);}
REG_DEAD r86:SI
deferring rescan insn with uid = 7.
Combine changes CCCmode comparison to CCZmode.
