[Bug target/95750] [x86] Use dummy atomic insn instead of mfence in __atomic_thread_fence(seq_cst)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95750

--- Comment #13 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:02363d5fdb862a11e6e65ac5b0d1f5ee0c422dc3

commit r11-2255-g02363d5fdb862a11e6e65ac5b0d1f5ee0c422dc3
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Tue Jul 21 20:22:05 2020 +0200

    i386: Fix insn conditions of mfence patterns [PR95750]

    2020-07-21  Uroš Bizjak  <ubiz...@gmail.com>

    gcc/ChangeLog:
            PR target/95750
            * config/i386/sync.md (mfence_sse2): Enable for
            TARGET_64BIT and TARGET_SSE2.
            (mfence_nosse): Always enable.