[Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs

[vincent-gcc at vinc17 dot net via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939

--- Comment #7 from Vincent Lefèvre <vincent-gcc at vinc17 dot net> ---
For i + 4095:

        add     %g1, 4095, %g1

For i + 4096:

        sub     %g1, -4096, %g1

For i + 4097:

        sethi   %hi(4195328), %g1
        srlx    %g1, 10, %g1
        add     %g2, %g1, %g1

SPARC can handle immediate signed constants directly up to 13 bits. For the
positive ones, that's up to 4095. If one wants to add 4096 or more, one has to
use sethi. But to add 4096, there is a specific optimization: subtract -4096,
since this constant fits in 13 bits (two's complement).