[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2021-02-04
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
          Component|target                      |rtl-optimization

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
So we expand from

  _4 = VIEW_CONVERT_EXPR<unsigned int>(a_3(D));
  _2 = _4 ^ 2147483648;
  _1 = VIEW_CONVERT_EXPR<float>(_2);
  return _1;

resulting in

(insn 6 5 7 (parallel [
            (set (reg:SI 87)
                (xor:SI (subreg:SI (reg/v:SF 85 [ a ]) 0)
                    (const_int -2147483648 [0xffffffff80000000])))
            (clobber (reg:CC 17 flags))
        ]) "z.c":4:20 -1
     (nil))

(insn 7 6 8 (set (reg:SF 84 [ <retval> ])
        (subreg:SF (reg:SI 87) 0)) "z.c":7:10 -1
     (nil))

initial RTL but CSE1 makes

(insn 6 3 7 2 (parallel [
            (set (reg:SI 87)
                (plus:SI (subreg:SI (reg/v:SF 85 [ a ]) 0)
                    (const_int -2147483648 [0xffffffff80000000])))
            (clobber (reg:CC 17 flags))
        ]) "z.c":4:20 209 {*addsi_1}

out of this likely removing the possibility that fwprop or combine elide
the subregs.