https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99092
--- Comment #10 from Andrew Pinski <pinskia at gcc dot gnu.org> --- >From the ARM ARM: An assembler program translating a Load/Store instruction, for example LDR, is required to encode an unambiguous offset using the unscaled 9-bit offset form, and to encode an ambiguous offset using the scaled 12-bit offset form. A programmer might force the generation of the unscaled 9-bit form by using one of the mnemonics in Table C3-17. Arm recommends that a disassembler outputs all unscaled 9-bit offset forms using one of these mnemonics, but unambiguous offsets can be output using a Load/Store single register mnemonic, for example, LDR.
