https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100093
--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> --- When ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL] is false, GCC goes to set up the bit MASK_AVX256_SPLIT_UNALIGNED_LOAD/STORE, but when ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL features[X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL] is true, it doesn't to clear the bit which causes the issue. if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD; if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE;