https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95650
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Severity|normal |enhancement
Build|aarch64-none-linux-gnu |
Host|aarch64-none-linux-gnu |
Last reconfirmed|2020-06-12 00:00:00 |2021-5-30
--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The problem is when combine comes in we get:
Trying 3, 8 -> 10:
3: r94:SI=zero_extend(x1:HI)
REG_DEAD x1:HI
8: r96:SI=zero_extend(x0:HI)+r94:SI
REG_DEAD x0:HI
REG_DEAD r94:SI
10: [r98:DI]=r96:SI#0
REG_DEAD r98:DI
REG_DEAD r96:SI
Failed to match this instruction:
(set (mem:HI (reg:DI 98) [1 *ptr_5(D)+0 S2 A16])
(plus:HI (reg:HI 1 x1 [ b ])
(reg:HI 0 x0 [ a ])))
There is no plus:HI pattern for aarch64 so there is no matching happening if we
do this a 3->2.
I don't know if combine could be enhanced here to allow widening to SI to
happen if HImode for plus does not exist.
