https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102017
--- Comment #2 from joseph at codesourcery dot com <joseph at codesourcery dot com> --- If you want to support exceptions and rounding modes for double precision on processors with hardware support for single-precision only floating-point arithmetic, I suggest using soft-fp instead of this Arm-specific code; lots of configurations use soft-fp integrated with hardware exceptions and rounding modes like that (e.g. for binary128 TFmode arithmetic on architectures without hardware support for it but with hardware SFmode and DFmode support). If you want to support exceptions, rounding modes or both on processors with no hardware floating-point, you have the complication of needing working TLS support from the runtime environment (if the floating-point code might ever be used in an environment with threads), because exceptions and rounding modes are thread-local (not global) state.
