https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89954
--- Comment #4 from Hongtao.liu <crazylht at gmail dot com> ---
-------- aarch64 dump-------
Failed to match this instruction:
(set (reg:SI 95)
(xor:SI (zero_extend:SI (mem/c:QI (lo_sum:DI (reg/f:DI 97)
(symbol_ref:DI ("*.LANCHOR0") [flags 0x182])) [0 c+0 S1
A8]))
(const_int 1 [0x1])))
Successfully matched this instruction:
(set (reg:SI 99)
(zero_extend:SI (mem/c:QI (lo_sum:DI (reg/f:DI 97)
(symbol_ref:DI ("*.LANCHOR0") [flags 0x182])) [0 c+0 S1 A8])))
Successfully matched this instruction:
(set (reg:SI 95)
(xor:SI (reg:SI 99)
(const_int 1 [0x1])))
---------dump end------------
It looks like there's splitter in aarch64 which combines load+xor+zero_extend
to zero_extend(mem) + xor, x86 doesn't have. The simple way is to add
corresponding define_split for x86.
---------x86 dump-----------
Failed to match this instruction:
(set (reg:SI 85)
(sign_extend:SI (xor:QI (mem/c:QI (symbol_ref:DI ("c") [flags 0x2]
<var_decl 0x7f94fd2e8c60 c>) [0 c+0 S1 A8])
(const_int 1 [0x1]))))
-----------dump end----------
