https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105753
--- Comment #1 from Filip Hejsek <filip.hejsek at gmail dot com> --- Not that i would really understand the machine description files, but the problem seems to be caused by this instruction definition: (define_insn_and_split "udivmodsi4" [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "") (match_operand:SI 2 "pseudo_register_operand" ""))) (set (match_operand:SI 3 "pseudo_register_operand" "") (umod:SI (match_dup 1) (match_dup 2))) (clobber (reg:SI 18)) (clobber (reg:SI 22)) (clobber (reg:HI 26)) (clobber (reg:HI 30))])] "" "this udivmodsi4 pattern should have been splitted;" "" [(set (reg:SI 22) (match_dup 1)) (set (reg:SI 18) (match_dup 2)) (parallel [(set (reg:SI 18) (udiv:SI (reg:SI 22) (reg:SI 18))) (set (reg:SI 22) (umod:SI (reg:SI 22) (reg:SI 18))) (clobber (reg:HI 26)) (clobber (reg:HI 30))]) (set (match_dup 0) (reg:SI 18)) (set (match_dup 3) (reg:SI 22))]) Just as in bug 88051, the instruction is missing from the generated switch in add_clobbers and removing pararllel from the definition fixes the problem. (I don't understand enough to know if it's the correct fix though.) There are 4 instructions with parallel in the definition: divmodpsi4, udivmodpsi4, divmodsi4, udivmodsi4.