https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106096
--- Comment #7 from Xi Ruoyao <xry111 at mengyan1223 dot wang> --- (In reply to Xi Ruoyao from comment #6) > (In reply to chenglulu from comment #5) > > Created attachment 53213 [details] > > Modify the allocation order of caller saved registers. > > I think we need to completely prevent LARCH_PROLOGUE_TEMP from being used > for sibcall For example, the RISC-V change explicitly exclude x5 (their temp for epilogue): https://gcc.gnu.org/legacy-ml/gcc-patches/2019-10/msg01228.html
