https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105661
Andrew Pinski <pinskia at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Depends on| |50677 Status|UNCONFIRMED |NEW Ever confirmed|0 |1 Severity|normal |enhancement Component|target |rtl-optimization Last reconfirmed| |2022-10-26 --- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> --- The aarch64 issue is not really a big difference but it is the same issue really. Basically we don't optimize anything related to volatile memory even into the address part. This is basically PR 50677 really. Referenced Bugs: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50677 [Bug 50677] volatile forces load into register