https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54063
HaoChen Gui <guihaoc at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |guihaoc at gcc dot gnu.org --- Comment #26 from HaoChen Gui <guihaoc at gcc dot gnu.org> --- I made an experiment to move the split of "tocref<mod>" berfore the reload (do it at split1). The additional addis can be optimized out by postreload cse on P9. Also Tested SPEC 2017, it seems not hit the problems Alan pointed out. But, there are several other issues. 1. The optimization relies on the sequence of insns. On P8, the memory load insn is moved ahead to the second addis by sched pass. So the postreload cse can't optimzies it as the r9 is used by the load. 2. The patch causes different register assignment. By comparing the object files in SPEC, we can see that the register assignment changes and it tends to use less registers with the patch. 3. The patch has side effect on BB head merging in jump2 pass. The sched pass commonly separates the two tocref insns if they're already split. Thus the sequence of insns in two branche arms might be changed. Sometime the BB head merging can be done with the patch, can't be done without the patch. While sometime it can't be done with the patch, but it can be done without the patch. The both positive and negative examples can be found in object files.