https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110117
--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The trunk branch has been updated by Andrew Pinski <pins...@gcc.gnu.org>: https://gcc.gnu.org/g:e60593f3881c72a96a3fa4844d73e8a2cd14f670 commit r14-1600-ge60593f3881c72a96a3fa4844d73e8a2cd14f670 Author: Andrew Pinski <apin...@marvell.com> Date: Sun Jun 4 19:21:05 2023 -0700 Improve do_store_flag for single bit when there is no non-zero bits In r14-1534-g908e5ab5c11c, I forgot you could turn off CCP or turn off the bit tracking part of CCP so we would lose out what TER was able to do before hand. This moves around the TER code so that it is used instead of just the nonzerobits. It also makes it easier to remove the TER part of the code later on too. OK? Bootstrapped and tested on x86_64-linux-gnu. Note it reintroduces PR 110117 (which was accidently fixed after r14-1534-g908e5ab5c11c). The next patch in series will fix that. gcc/ChangeLog: * expr.cc (do_store_flag): Rearrange the TER code so that it overrides the nonzero bits info if we had `a & POW2`.
