https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110309
--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Richard Biener from comment #1)
> I think the two
>
> (define_expand "maskload<mode><avx512fmaskmodelower>"
> [(set (match_operand:V48H_AVX512VL 0 "register_operand")
> (vec_merge:V48H_AVX512VL
> (match_operand:V48H_AVX512VL 1 "memory_operand")
> (match_dup 0)
> (match_operand:<avx512fmaskmode> 2 "register_operand")))]
> "TARGET_AVX512F")
>
> (define_expand "maskload<mode><avx512fmaskmodelower>"
> [(set (match_operand:VI12_AVX512VL 0 "register_operand")
> (vec_merge:VI12_AVX512VL
> (match_operand:VI12_AVX512VL 1 "memory_operand")
> (match_dup 0)
> (match_operand:<avx512fmaskmode> 2 "register_operand")))]
> "TARGET_AVX512BW")
>
> patterns are wrong (all others use UNSPEC_MASKMOV)
UNSPEC_MASKMOV is used for MASKMOV, UNSPEC_MASK_LOAD is used for avx512 mask,
5;; If mem_addr points to a memory region with less than whole vector size
bytes
1386;; of accessible memory and k is a mask that would prevent reading the
inaccessible
1387;; bytes from mem_addr, add UNSPEC_MASKLOAD to prevent it to be
transformed to vpblendd
1388;; See pr97642.
1389(define_expand "<avx512>_load<mode>_mask"
1390 [(set (match_operand:V48_AVX512VL 0 "register_operand")
1391 (vec_merge:V48_AVX512VL
1392 (match_operand:V48_AVX512VL 1 "nonimmediate_operand")
1393 (match_operand:V48_AVX512VL 2 "nonimm_or_0_operand")
1394 (match_operand:<avx512fmaskmode> 3
"register_or_constm1_operand")))]
1395 "TARGET_AVX512F"
1396{
1397 if (CONST_INT_P (operands[3]))
1398 {
1399 emit_insn (gen_rtx_SET (operands[0], operands[1]));
1400 DONE;
1401 }
1402 else if (MEM_P (operands[1]))
1403 operands[1] = gen_rtx_UNSPEC (<MODE>mode,
1404 gen_rtvec(1, operands[1]),
1405 UNSPEC_MASKLOAD);
1406})
1407
Yes, those 2 patterns needs to be fixed.
