https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111765
--- Comment #3 from JuzheZhong <juzhe.zhong at rivai dot ai> --- If we specify the vector length to RVV and SVE: https://godbolt.org/z/njvsqYWhn Both can vectorize. ARM SVE: -msve-vector-bits=128 RVV: --param=riscv-autovec-preference=fixed-vlmax
