https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112102
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> --- Which mips arch are you really trying to compile for? Mips 1, 2, 4 or mips32 (r1-r5 or r6). There are many different ones and mips32 (and above) does not have any delay slots/hazards for the mult instruction.
