https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112801
Bug ID: 112801
Summary: [14] RISC-V vector: failure to mask top bits during
type conversion
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: patrick at rivosinc dot com
Target Milestone: ---
This testcase is correctly handled on rv64gc but fails on rv64gcv -O2
> ./bin/riscv64-unknown-linux-gnu-gcc -march=rv64gcv -mabi=lp64d -O2 red.c -o
> rv64gcv.out
Creduced testcase:
int printf(char *, ...);
int a;
void c(int b) { a = b; }
char d;
char *const e = &d;
long f = 66483309998;
unsigned long g[2];
short h;
int k;
void l() {
int i = 0;
for (; i < 2; i++) {
{
unsigned long *m = &g[0];
*m &= 2;
if (f && *e)
for (;;)
;
}
k = f;
g[1] = k;
for (; h;)
;
}
}
int main() {
l();
c(g[1] >> 32);
printf("%X\n", a);
}
Here's my analysis:
Focusing on the stack of operations that lead to a:
long f = 66483309998; // hex: F7AB6CDAE
int k = f; // Should mask off the top bits: 7AB6CDAE
unsigned long g[1] = k; // 7AB6CDAE
int arg to c() = g[1]; >> 32 // 0
int a = arg; // 0
print(a); // 0
0 is expected but rv64gcv fails to mask the top bits and ends up printing F
Tested using qemu with these commands:
> ./bin/riscv64-unknown-linux-gnu-gcc -march=rv64gcv -mabi=lp64d -O2 red.c -o
> rv64gcv.out
> ./bin/riscv64-unknown-linux-gnu-gcc -march=rv64gc -mabi=lp64d -O2 red.c -o
> rv64gc.out
> QEMU_CPU="rv64,vlen=128,v=true,vext_spec=v1.0,Zve32f=true,Zve64f=true"
> ./bin/qemu-riscv64 rv64gc.out
0
> QEMU_CPU="rv64,vlen=128,v=true,vext_spec=v1.0,Zve32f=true,Zve64f=true"
> ./bin/qemu-riscv64 rv64gcv.out
F
