https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113023
--- Comment #4 from Iain Finlay <iwfinlay at gmail dot com> --- GCC does know that it needs LANCHOR0 and LANCHOR0+4 (meaning a difference of 4). The 12-bit lower portion can be provided in the load and store commands. It seems just an implementation choice in pcnt0 that it commits to the addi rather than use the lw/sw, no?
