https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113087
--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Pan Li <pa...@gcc.gnu.org>: https://gcc.gnu.org/g:d82bb518fa372cc30cc3352e0a124d0bd6deb36f commit r14-6760-gd82bb518fa372cc30cc3352e0a124d0bd6deb36f Author: Juzhe-Zhong <juzhe.zh...@rivai.ai> Date: Wed Dec 20 14:50:11 2023 +0800 RISC-V: Fix bug of VSETVL fusion This patch fixes bugs in the fusion of this following case: li a5,-1 vmv.s.x v0,a5 -> demand any non-zero AVL vsetvli a5, ... Incorrect fusion after VSETVL PASS: li a5,-1 vsetvli a5... vmv.s.x v0, a5 --> a5 is modified as incorrect value. We disallow this incorrect fusion above. Full coverage testing of RV64 and RV32 no regression. PR target/113087 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc: Disallow fusion when VL modification pollutes non AVL use. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr113087-1.c: New test.
