https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113623
--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The trunk branch has been updated by Richard Sandiford <rsand...@gcc.gnu.org>: https://gcc.gnu.org/g:fa2739ac1b74769d97fba34db9b9a8aa8786539e commit r14-8519-gfa2739ac1b74769d97fba34db9b9a8aa8786539e Author: Richard Sandiford <richard.sandif...@arm.com> Date: Tue Jan 30 09:30:35 2024 +0000 aarch64: Avoid allocating FPRs to address registers [PR113623] For something like: void foo (void) { int *ptr; asm volatile ("%0" : "=w" (ptr)); asm volatile ("%0" :: "m" (*ptr)); } early-ra would allocate ptr to an FPR for the first asm, thus leaving an FPR address in the second asm. The address was then reloaded by LRA to make it valid. But early-ra shouldn't be allocating at all in that kind of situation. Doing so caused the ICE in the PR (with LDP fusion). Fixed by making sure that we record address references as GPR references. gcc/ PR target/113623 * config/aarch64/aarch64-early-ra.cc (early_ra::preprocess_insns): Mark all registers that occur in addresses as needing a GPR. gcc/testsuite/ PR target/113623 * gcc.c-torture/compile/pr113623.c: New test.
