[Bug target/114017] RISC-V: wrong __riscv_v_intrinsic predefined macro value (14.x)

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114017

--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:3688c2b1a604a16b9ff46935770976960016b15c

commit r14-9128-g3688c2b1a604a16b9ff46935770976960016b15c
Author: Pan Li <pan2...@intel.com>
Date:   Wed Feb 21 12:06:22 2024 +0800

    RISC-V: Upgrade RVV intrinsic version to 0.12

    Upgrade the version of RVV intrinsic from 0.11 to 0.12.

            PR target/114017

    gcc/ChangeLog:

            * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade
            the version to 0.12.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/predef-__riscv_v_intrinsic.c: Update the
            version to 0.12.
            * gcc.target/riscv/rvv/base/pr114017-1.c: New test.

    Signed-off-by: Pan Li <pan2...@intel.com>