https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114027
--- Comment #4 from Li Pan <pan2.li at intel dot com> --- Just did some hacks from the riscv backend, which is to replace the expanding code of reduc_smax_scal_<mode> to the reduc_xor_scal_<mode>. diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md index 3b32369f68c..58424baabd7 100644 --- a/gcc/config/riscv/autovec.md +++ b/gcc/config/riscv/autovec.md @@ -2107,10 +2107,8 @@ (define_expand "reduc_smax_scal_<mode>" (match_operand:V_VLSI 1 "register_operand")] "TARGET_VECTOR" { - int prec = GET_MODE_PRECISION (<VEL>mode); - rtx min = immed_wide_int_const (wi::min_value (prec, SIGNED), <VEL>mode); - riscv_vector::expand_reduction (UNSPEC_REDUC_MAX, riscv_vector::REDUCE_OP, - operands, min); + riscv_vector::expand_reduction (UNSPEC_REDUC_XOR, riscv_vector::REDUCE_OP, + operands, CONST0_RTX (<VEL>mode)); DONE; }) My idea would like to prove that the last standard name should be .REDUC_XOR. Then the test (include the narrowed and the original one) can pass. That may indicates we take .REDUC_MAX by mistake in somewhere. let me try to figure it out.